tag_select HDL Worker

HDL implementation of a metadata-aware channel selection tap that filters and batches one channel from a tagged front-end fold output stream.

Detail

The worker consumes the interleaved metadata+sample stream produced by ted_x16, dsd_x16, or fs_x16. Each symbol from those workers arrives as a pair of WSI messages:

  • A 4-word metadata_op_e message (SOM on beat 0, EOM on beat 3). The channel identifier occupies the low byte of the third data beat (beat index 2, zero-based), which carries the value[31:0] = channel field.

  • A 1-word sample_op_e message (SOM+EOM) carrying the symbol or soft- decision payload.

The input parser tracks which metadata beat is currently in flight using midx (2-bit counter). midx resets to 1 (the next expected beat after SOM, which has already been consumed) when a metadata SOM is seen, and the channel id is captured into cur_ch when midx = 2. On receipt of a sample word, if cur_ch equals the channel property the word is pushed into the FIFO; otherwise it is discarded.

FIFO: 2048-deep × 32-bit shift register implemented as a ram_style="distributed" LUT-RAM array (fifo_t). The attribute ensures Vivado infers distributed RAM rather than BRAM, keeping read-latency at one cycle without the BRAM output-register pipeline hazard.

Output batching FSM (ostate):

  • OS_IDLE: waits until the FIFO holds at least BATCH (1024) samples, or until EOF is asserted and at least one sample remains.

  • OS_SEND: presents FIFO data on the output port, one word per cycle, honouring output_in.ready back-pressure. SOM is asserted on the first word of a batch (send_rem = msg_len); EOM on the last (send_rem = 1).

  • OS_EOF: asserts output_out.eof after the final batch has been consumed.

The shared count register tracks FIFO occupancy. Both write (do_wr) and read (do_rd) are pulse variables resolved in the same clock edge to avoid double-counting when a simultaneous push and pop occur.

Latency: sample words are buffered in the FIFO; end-to-end latency from reception of a matching sample word to its appearance on the output is bounded by the FIFO occupancy at the time of receipt plus any downstream back-pressure.

Worker Properties

  • ocpi_buffer_size_output

    • Type: ushort

    • Access:

      • Parameter: False

      • Writable: False

      • Initial: True

      • Volatile: False

      • Read back: False

    • Default value: 0

  • ocpi_blocked_output

    • Type: ulong

    • Access:

      • Parameter: False

      • Writable: False

      • Initial: False

      • Volatile: True

      • Read back: False

    • Default value: None

  • ocpi_max_latency_output

    • Type: ushort

    • Access:

      • Parameter: True

      • Writable: False

      • Initial: False

      • Volatile: False

      • Read back: False

    • Default value: None

  • ocpi_latency_output

    • Type: ushort

    • Access:

      • Parameter: False

      • Writable: False

      • Initial: False

      • Volatile: True

      • Read back: False

    • Default value: None

  • ocpi_messages_output

    • Type: ulong

    • Access:

      • Parameter: False

      • Writable: False

      • Initial: False

      • Volatile: True

      • Read back: False

    • Default value: None

  • ocpi_bytes_output

    • Type: ulong

    • Access:

      • Parameter: False

      • Writable: False

      • Initial: False

      • Volatile: True

      • Read back: False

    • Default value: None

Worker Ports

    Inputs:

  • input

    • Protocol: complex_short_timed_sample

    • Optional: False

    • Outputs:

  • output

    • Protocol: complex_short_timed_sample

    • Optional: False

Worker Ports

Inputs:

  • input:

    • Type: StreamInterface

    • Protocol: complex_short_timed_sample-prot

    • ClockDirection: in

    • Data width: 32

Outputs:

  • output:

    • Type: StreamInterface

    • Protocol: complex_short_timed_sample-prot

    • Worker EOF: true

    • Clock: input

    • Data width: 32

Utilisation

Utilization reporting is not currently implemented.