decimate3 HDL Worker
HDL implementation of a frame-level integer decimator for the
complex_short_timed_sample protocol, targeting 3:1 reduction of 12 SPS
channelizer output to 4 SPS demodulator input.
Detail
The worker operates on complete 16-sample messages (frames) rather than on
individual IQ words. With the default factor = 3, every third input
message is forwarded verbatim and the intervening two are dropped.
Phase counter: frame_phase is an 8-bit counter, range
0..(factor-1). It increments by one on each input SOM beat and wraps
to zero after reaching factor - 1. The fac integer variable is read
from props_in.factor each clock edge and clamped to a minimum of 1 to
guard against a zero write.
Forward decision:
fwd_combis the combinatorial keep signal for the current input word:fwd_comb = '1' when (som='1' and frame_phase=0) or (som='0' and fwd_reg='1') else '0'
fwd_regis the registered keep decision latched at each SOM. It is set to'1'whenframe_phase = 0(this message is to be kept) and to'0'otherwise. It remains stable through all 16 words of the message.Combining the SOM-case combinatorially with the non-SOM case via
fwd_combensures the SOM word itself is forwarded without a one-cycle gap, giving clean SOM/EOM passthrough on kept messages.
Forwarding: when fwd_comb = '1', all output signals are driven directly
from the corresponding input signals (data, opcode, byte-enable, SOM, EOM).
When fwd_comb = '0', give and valid are held low so the output
port sees no transaction. The worker always takes input
(input_out.take <= input_in.ready).
EOF propagation: the eof_seen flag is set on the first cycle that
input_in.eof is asserted and is held until reset. It is forwarded on
output_out.eof combinatorially, so the EOF appears on the output in the
same cycle it arrives on the input.
Latency: zero additional pipeline cycles for forwarded messages. Dropped
messages contribute no latency. The fwd_reg register is set on the SOM
cycle but is not needed until the second word of a kept message, so no
additional delay is visible to the downstream consumer.
Worker Properties
ocpi_buffer_size_outputType:
ushortAccess:
Parameter:
FalseWritable:
FalseInitial:
TrueVolatile:
FalseRead back:
False
Default value:
0
ocpi_blocked_outputType:
ulongAccess:
Parameter:
FalseWritable:
FalseInitial:
FalseVolatile:
TrueRead back:
False
Default value:
None
ocpi_max_latency_outputType:
ushortAccess:
Parameter:
TrueWritable:
FalseInitial:
FalseVolatile:
FalseRead back:
False
Default value:
None
ocpi_latency_outputType:
ushortAccess:
Parameter:
FalseWritable:
FalseInitial:
FalseVolatile:
TrueRead back:
False
Default value:
None
ocpi_messages_outputType:
ulongAccess:
Parameter:
FalseWritable:
FalseInitial:
FalseVolatile:
TrueRead back:
False
Default value:
None
ocpi_bytes_outputType:
ulongAccess:
Parameter:
FalseWritable:
FalseInitial:
FalseVolatile:
TrueRead back:
False
Default value:
None
Worker Ports
inputProtocol:
complex_short_timed_sampleOptional:
False
outputProtocol:
complex_short_timed_sampleOptional:
False
Inputs:
Outputs:
Worker Ports
Inputs:
input:Type:
StreamInterfaceProtocol:
complex_short_timed_sample-protClockDirection:
inData width:
32
Outputs:
output:Type:
StreamInterfaceProtocol:
complex_short_timed_sample-protWorker EOF:
trueClock:
inputData width:
32
Utilisation
Utilization reporting is not currently implemented.