chan_select HDL Worker
HDL implementation of a positional channel selection tap that extracts and batches one slot from a 16-sample interleaved frame stream.
Detail
The input stream carries 16-sample sample_op_e messages produced by the
channelizer, decimate3, bd_x16, or cr_x16. Within each message
the bin identity is determined by slot position (the word’s position within
the message, 0..15), not by any embedded metadata tag.
Slot tracking: the pos counter (4-bit unsigned) is reset to zero
whenever a SOM beat is seen. For SOM words (pos is implicitly 0) the
worker checks whether sel = 0 and, if so, pushes the IQ word into the
FIFO. For non-SOM words, pos is compared against sel after the
increment that has been applied to it since the last SOM; the check
(pos + 1) = sel is evaluated before the registered increment so that slot
1 is matched on the first non-SOM beat. The SOM-resync property means any
input alignment error recovers cleanly on the next incoming SOM.
FIFO: 2048-deep × 32-bit array with ram_style="distributed", identical
in structure to the FIFO in tag_select. The distributed-RAM attribute
keeps the read path single-cycle and avoids BRAM output-register latency.
Output batching FSM (ostate):
OS_IDLE: waits for the FIFO to reachBATCH(1024) samples, or for EOF with any remaining samples.OS_SEND: clocks FIFO words out one per cycle subject tooutput_in.readyback-pressure. SOM is asserted whensend_rem = msg_len(first word); EOM whensend_rem = 1(last word).OS_EOF: assertsoutput_out.eofafter the final batch completes.
The shared count register tracks FIFO occupancy and is updated by pulse
variables do_wr and do_rd resolved within the same clock edge so that
simultaneous push and pop are correctly counted.
All input is consumed unconditionally (input_out.take <= input_in.ready);
the worker exerts no back-pressure upstream.
Latency: selected IQ words are buffered in the FIFO. Time from reception of a matching slot word to its appearance at the output depends on FIFO fill and downstream back-pressure, bounded by the 2048-entry FIFO depth.
Worker Properties
ocpi_buffer_size_outputType:
ushortAccess:
Parameter:
FalseWritable:
FalseInitial:
TrueVolatile:
FalseRead back:
False
Default value:
0
ocpi_blocked_outputType:
ulongAccess:
Parameter:
FalseWritable:
FalseInitial:
FalseVolatile:
TrueRead back:
False
Default value:
None
ocpi_max_latency_outputType:
ushortAccess:
Parameter:
TrueWritable:
FalseInitial:
FalseVolatile:
FalseRead back:
False
Default value:
None
ocpi_latency_outputType:
ushortAccess:
Parameter:
FalseWritable:
FalseInitial:
FalseVolatile:
TrueRead back:
False
Default value:
None
ocpi_messages_outputType:
ulongAccess:
Parameter:
FalseWritable:
FalseInitial:
FalseVolatile:
TrueRead back:
False
Default value:
None
ocpi_bytes_outputType:
ulongAccess:
Parameter:
FalseWritable:
FalseInitial:
FalseVolatile:
TrueRead back:
False
Default value:
None
Worker Ports
inputProtocol:
complex_short_timed_sampleOptional:
False
outputProtocol:
complex_short_timed_sampleOptional:
False
Inputs:
Outputs:
Worker Ports
Inputs:
input:Type:
StreamInterfaceProtocol:
complex_short_timed_sample-protClockDirection:
inData width:
32
Outputs:
output:Type:
StreamInterfaceProtocol:
complex_short_timed_sample-protWorker EOF:
trueClock:
inputData width:
32
Utilisation
Utilization reporting is not currently implemented.